As a Senior DSP/FPGA Engineer, you will play a key role in developing microelectronic systems for space applications at a major European space facility in the Netherlands. Your work will focus on FPGA design, digital signal processing, and integrated circuit development, contributing directly to the success of current and future space missions.
Key Responsibilities
- Design and implement microelectronic systems, including FPGAs, ASICs, and IP cores for digital and mixed-signal applications
- Lead development projects from concept through qualification and deployment
- Verify and validate circuit functionality, performance, and environmental resilience
- Apply advanced design methodologies across hardware-software co-design, synthesis, place and route, and layout
- Ensure compliance with space and commercial microelectronics standards
- Implement signal processing algorithms such as filtering, FFT, and sampling techniques in FPGA environments
- Support industrial microelectronics activities with technical oversight and guidance
- Conduct functional, electrical, and environmental testing of integrated circuits
Qualifications
A Master’s degree in a relevant engineering field is required. You must have proven experience in microelectronic design and development, including FPGA and digital signal processing. Expertise in hardware description languages (VHDL, Verilog), synthesis tools, and verification workflows is essential. Candidates must be eligible for EU security clearance.
Preferred Skills
- Experience with baseband communication algorithms, including modulation, coding, and error correction for satellite or 3GPP systems
- Familiarity with GNSS, SAR, or image/video signal processing
- Proficiency in system-level modeling using Matlab, SystemC, or SystemVerilog
- Knowledge of processor architectures such as RISC-V, SPARC, or ARM
- Understanding of Spacewire, Spacefibre, PCIe, JESD204, CAN, or MIL-STD-1553 interfaces
- Background in high-level synthesis, auto-coding, or HDL linting tools
- Programming skills in C, C++, or Python
Work Environment & Benefits
This is a permanent position based at ESTEC in the Netherlands, operating under a hybrid model with three days on-site and two days remote. Core working hours are flexible, allowing you to manage your schedule. Benefits include a competitive salary, 30 days of annual leave plus ESTEC closures, comprehensive health coverage, a pension plan with no personal contribution, and a relocation package. Professional growth is supported through Coursera access and a dedicated training budget. A travel allowance is also provided.
