The ASIC Design Technical Leader will focus on design and timing constraints for next-generation networking chips as part of Cisco's Silicon One team. This role involves leading fullchip SDC development, collaborating with front-end and back-end teams, and ensuring timing closure across multiple modes while mentoring RTL designers on constraint creation.
What You'll Do
- Being a member of design team who oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing modes.
- Option to also do block level RTL design or block or top-level IP integration.
- Helping develop efficient methodology to promote block level SDCs to fullchip, and to bring fullchip SDC changes back to block level.
- Helping develop and apply methodology to ensure correctness and quality of SDCs as early as possible in design cycle.
- Reviewing block level SDCs and clocking diagrams and mentor other RTL design owners on SDC development.
- Creating fullchip clocking diagrams and related documentation.
What We're Looking For
- Bachelor’s Degree in Electrical or Computer Engineering with 8+ years of ASIC or related experience or Master’s Degree in Electrical or Computer Engineering with 6+ years of ASIC or related experience.
- Experience with block/full chip SDC development in functional and test modes.
- Experience in Static Timing Analysis and prior working experience with STA tools like PrimeTime/Tempus.
- Understanding of related digital design concepts (eg. clocking and async boundaries).
- Experience with synthesis tools (eg. Synopsys DC/DCG/FC), Verilog/System Verilog programming.
Nice to Have
- Experience with constraint analyzer tools such as TCM (Timing Constraint Manager from Synopsys) and CCD (Conformal Constraint Designer from Cadence).
- Experience with Spyglass CDC and glitch analysis.
- Experience using Formal Verification: Synopsys Formality and Cadence LEC.
- Experience with scripting languages such as Python, Perl, or TCL.
Technical Stack
- PrimeTime, Tempus, Synopsys DC, Synopsys DCG, Synopsys FC, Verilog, System Verilog, TCM (Timing Constraint Manager), CCD (Conformal Constraint Designer), Spyglass CDC, Synopsys Formality, Cadence LEC, Python, Perl, TCL
Team & Environment
- Small, startup-style team within a large multi-geography organization
- Part of Cisco Silicon One team; collaborates with other ASIC teams across full lifecycle
Benefits & Compensation
- Medical, dental and vision insurance
- 401(k) plan with a Cisco matching contribution
- Paid parental leave
- Short and long-term disability coverage
- Basic life insurance
- Grants of Cisco restricted stock units (vest over time)
- 10 paid holidays per full calendar year
- 1 floating holiday for non-exempt employees
- 1 paid day off for employee’s birthday
- Paid year-end holiday shutdown
- 4 paid days off for personal wellness determined by Cisco
- Non-exempt employees receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
- Exempt employees participate in Cisco’s flexible vacation time off program (no defined limit, subject to availability and business limitations)
- 80 hours of sick time off provided on hire date and each January 1st thereafter
- Up to 80 hours of unused sick time carried forward from one calendar year to the next
- Additional paid time away may be requested to deal with critical or emergency issues for family members
- Optional 10 paid days per full calendar year to volunteer
- Annual bonuses for non-sales roles (subject to Cisco’s policies)
- Performance-based incentive pay for sales roles (split between quota and non-quota components)
- For quota-based incentive pay: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; incentive rates at or above 1% for each 1% of attainment beyond 100% with no cap
- For non-quota-based sales performance elements: Cisco may pay 0% up to 125%% of target
- No minimum threshold of performance for sales incentive compensation to be paid
- Starting salary range: $168,800.00 to $241,200.00 (U.S. and/or Canada); New York City Metro Area: $168,800.00 - $277,400.00; Non-Metro New York state & Washington state: $148,800.00 - $248,200.00
- Grants of Cisco restricted stock units (vest following continued employment with Cisco for defined periods of time)
- Incentive compensation (annual bonuses for non-sales roles; uncapped performance-based incentive pay for sales roles)
Work Mode
- Onsite
- San Jose
- 5 days per week onsite
Cisco Systems, Inc. is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, or protected veteran status and will not be discriminated against on the basis of disability.
