Gem is seeking an Embedded Systems Intern to solve workflow fragmentation by unifying RISC-V development across manual FPGA simulations and hardware bring-up. You will be responsible for creating a single, sleek VS Code-integrated GUI that serves as the Command Center for the entire engineering team.
What You'll Do
- Unify RISC-V development into a single, sleek VS Code-integrated GUI that serves as the Command Center for the entire engineering team.
- Deliver a standalone and VS Code-integrated PySide6 GUI and/or VS Code Plugin(s) that automate the full loop: loading bare-metal/Linux images, managing serial consoles, reset control via STM32G, and GDB debugging across both Xilinx FPGA and Thunderbird targets.
What We're Looking For
- Major in Electrical Engineering or Computer Science.
- Expertise in Python/PySide6, C/CMake.
- Experience with GDB/JTAG debugging tools.
Technical Stack
- Python
- PySide6
- C
- CMake
- GDB
- JTAG
- RISC-V
- FPGA
- STM32G
- VS Code
