Micron is looking for a Staff Engineer to lead end-to-end validation execution in a high-pressure, fast-paced environment. You will be part of an inclusive team passionate about using their expertise in the relentless pursuit of innovation.
What You'll Do
- Lead end-to-end Validation Run execution ensuring on-schedule starts/completions, risk-aware re-plans, and efficient material usage.
- Own time-bound data crunching pipelines and deliver decision-ready summary reports and sightings by agreed Cycle Time.
- Guarantee coverage completeness across MBIST and Native flows; drive Hot/Cold corners, TSV screen/AQLK, async timing boundary coverage, and evidence-backed closure.
- Develop and debug test programs on SM3/Cobra and Advantest V93K; enforce code quality, reviews, and release discipline.
- Align hardware configs (handler, socket, loadboard, probe card) to test intent and throughput targets.
- Perform power/thermal characterization; correlate IDD/thermal data with performance/reliability; author recommendations for content changes and silicon fixes.
- Architect and execute Verilog simulations to replicate platform sightings, validate hypotheses, and de-risk content changes before deployment.
- Build automation scripts and dashboards for anomaly detection, trend analysis, and coverage auditing.
- Lead silicon debug across Design, Verification, Quality, and System Engineering; drive corrective action closure with clear root-cause evidence.
- Implement cycle-time optimization strategies (parallelization, smarter sampling, content pruning, throughput tuning).
- Contribute to DFMEA gap closure and codify 'Definition of Success' for validation quality.
- Coach junior engineers on validation best practices, platform nuances, simulation methodology, and reporting standards.
- Partner with global teams (Boise, Folsom, Hyderabad, Taiwan) for material readiness and platform enablement.
What We're Looking For
- Bachelor’s/Master’s in Electrical or Computer Engineering or a related field.
- 8+ years in DRAM/HBM/NAND validation or product engineering.
- At least 1 year of HBM Validation experience.
- Test platform code development in C/C++, Python, and APG (Algorithmic Pattern Generator).
- Strong expertise in MBIST (SM3/Cobra) or Native Mode (Advantest V93K) testing.
- Verilog simulation expertise including bench architecture, stimulus/checkers, waveform/log analysis, and correlation to platform behavior.
- Proven ability to execute ValRuns and perform high-speed I/O validation with eye/IDD characterization.
- Advanced scripting and data analytics skills; experience with Confluence/Jira and Git/Perforce.
Nice to Have
- Linux programming experience; familiarity with UVM and version control systems (Git/SVN).
- Comfortable with lab equipment such as oscilloscopes and logic analyzers.
- Experience defining CS/QS shmoo targets, async timing boundaries, and coverage-driven acceptance criteria.
- Familiarity with automation and ML-driven validation workflows (e.g., anomaly classifiers, trend predictors).
Technical Stack
- C/C++, Python, APG (Algorithmic Pattern Generator)
- SM3/Cobra, Advantest V93K, MBIST
- Verilog
- Confluence/Jira, Git/Perforce
- Linux, UVM, Git/SVN
Team & Environment
You will partner with global teams located in Boise, Folsom, Hyderabad, and Taiwan.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.
