Altera is hiring a Senior OSAT Engineer

Intel is looking for a Senior OSAT Engineer to drive outsourced assembly and test engineering activities across the global supplier network. You will lead new product introduction readiness, yield optimization, cost improvements, and qualification activity for packaging and test flows supporting FPGA and SoC products.

What You'll Do

• Lead technical engagement with OSAT suppliers on assembly and test process development, yield ramp, quality improvement, and volume manufacturing readiness.
• Drive new product introduction from engineering builds through production release, ensuring OSAT capability meets electrical, thermal, and mechanical requirements.
• Optimize packaging and test architectures for performance, cost, and reliability including flip-chip BGA, high-pin-count packages, and wafer-level solutions.
• Monitor and improve backend yield performance using data-driven analysis; lead root cause and corrective actions for systemic issues.
• Partner with Test Engineering, Packaging, Product Engineering, and Quality teams on process optimization and failure analysis.
• Implement and maintain process control systems, SPC methodologies, and lean manufacturing principles at OSAT partners.
• Support cost reduction initiatives including BOM optimization, process simplification, and cycle time improvements.
• Track supplier performance metrics such as yield, DPPM, and cost; provide updates with risk assessments and mitigation plans.
• Lead or support reliability testing and package qualification activities aligned to industry standards like JEDEC and AEC-Q.
• Maintain strong technical relationships and communication cadence with OSAT partners to ensure collaboration and escalation management.

What We're Looking For

• Bachelor’s degree in Electrical Engineering, Materials Science, Mechanical Engineering, or a related field.
• 10+ years of semiconductor assembly, packaging, or test engineering experience.
• Hands-on experience with OSAT manufacturing environments, including wafer finishing, substrate attach, interconnect packaging, test, and burn-in.
• Strong technical understanding of backend manufacturing flows: flip-chip, wire bond, underfill, molding, and final test.
• Proven ability to analyze yield, reliability, and cost data to drive engineering decisions.
• Demonstrated success working with international suppliers and cross-functional teams.
• Strong written and verbal communication skills, including technical reporting and supplier engagement.

Nice to Have

• FPGA, ASIC, or SoC backend experience, particularly with high-pin-count or high-power devices.
• Experience in automotive or high-reliability product qualifications such as AEC-Q or ISO standards.
• Familiarity with advanced packaging: 2.5D/3D, fan-out WLP, heterogeneous integration.
• Knowledge of supply chain risk mitigation, dual sourcing, and volume scaling strategies.
• Experience with automation, traceability systems, and smart factory analytics.

Work Mode

This position follows a local-country work mode based in Taipei, Taiwan.

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.