Anaconda is hiring an Emulation Engineer to lead the pre-silicon validation strategy for our AI hardware initiative at Positron.ai. You will architect and own the Cadence Palladium Z3 environment, serving as the critical bridge between hardware design and system software to ensure silicon is validated and the software stack is ready before chips return from fabrication.
What You'll Do
- Define and execute the end-to-end emulation strategy for our next-generation AI Inference ASIC.
- Oversee the complex, multi-site build process for emulation targets, ensuring design and software synchronization.
- Manage builds, deployment, job scheduling, and resource allocation for the Palladium Z3 cluster hosted via Cadence Cloud.
- Act as the primary technical bridge between the ASIC Design/DV teams and the System Software team.
- Recruit, mentor, and lead a lean team of emulation specialists.
- Oversee the creation of transactors, monitors, and complex testbenches.
- Drive the development of a comprehensive emulation testplan targeting hardware bugs and software performance bottlenecks.
- Lead deep-dive debug sessions using Palladium’s advanced trace and capture capabilities to resolve complex SoC-level issues.
What We're Looking For
- 8+ years of experience in ASIC/SoC verification or emulation.
- At least 2+ years in a leadership or 'Architect' capacity.
- Deep, hands-on experience with Cadence Palladium systems (Z1, Z2, or Z3).
- Knowledge of the IXCOM/Dynamic Emulation interfaces.
- Proficiency in SystemVerilog/UVM for emulation-ready testbenches.
- Strong understanding of high-speed interfaces (PCIe, CXL, DDR5) and AI-specific data flows.
- Comfortable with scripting (Python, Tcl) to automate build flows and results analysis.
- A proactive 'Startup' mindset, comfortable working in a fully remote, fast-paced environment.
Nice to Have
- Experience with AI/ML hardware accelerators or large-scale multi-core SoCs.
- Familiarity with hybrid emulation (Virtual Platforms + Palladium).
- Experience managing cloud-hosted hardware infrastructure.
Technical Stack
- Cadence Palladium (Z1, Z2, Z3)
- SystemVerilog, UVM
- Python, Tcl
- PCIe, CXL, DDR5
Team & Environment
You will lead a lean, elite team of emulation specialists.
Benefits & Compensation
- Competitive salary
- Equity
- Comprehensive benefits
Work Mode
This is a fully remote position open to candidates globally.
Anaconda is an equal opportunity employer.
