Lead pre-silicon validation for a next-generation AI Inference ASIC by owning the Cadence Palladium Z3 emulation environment. Build and lead a focused team, and serve as the technical liaison between hardware design and system software teams to ensure silicon and software readiness ahead of fabrication.
Responsibilities
- Develop and execute a comprehensive emulation strategy for a next-generation AI Inference ASIC from start to finish.
- Manage the complex, multi-site build process for emulation targets, ensuring tight alignment between hardware design and software development.
- Operate and maintain the Palladium Z3 cluster hosted on Cadence Cloud, including job scheduling, resource allocation, and deployment management.
- Serve as the primary technical link between ASIC design/verification and system software teams, enabling high-fidelity testing for drivers and compilers.
- Recruit, mentor, and lead a small, high-performing team of emulation engineers.
- Oversee the development of transactors, monitors, and advanced testbenches, and establish a robust emulation testplan targeting both hardware defects and software performance issues.
- Lead in-depth debugging using Palladium’s trace and capture tools to diagnose and resolve system-level SoC problems.
Requirements
- Minimum of 8 years in ASIC or SoC verification or emulation, with at least 2 years in a leadership or architectural role.
- Extensive hands-on experience with Cadence Palladium platforms, particularly Z1, Z2, or Z3, including IXCOM and Dynamic Emulation interfaces.
- Strong proficiency in SystemVerilog and UVM for creating testbenches compatible with emulation environments.
- Solid knowledge of high-speed interfaces such as PCIe, CXL, and DDR5, along with understanding of AI-specific data movement patterns.
- Skilled in scripting with Python and Tcl to automate build processes and analyze results.
- Proactive problem-solver comfortable in a fully remote, fast-moving environment.
Nice to Have
- Experience working on AI/ML hardware accelerators or large-scale multi-core system-on-chip designs.
- Familiarity with hybrid emulation approaches combining Virtual Platforms and Palladium.
- Background managing cloud-hosted hardware infrastructure.
Tech Stack
Cadence Palladium, SystemVerilog, UVM, Python, Tcl, PCIe, CXL, DDR5
Benefits
- Opportunity to contribute to a fast-growing AI startup shaping the future of AI hardware.
- Work on cutting-edge technology alongside a highly skilled and passionate engineering team.
- Competitive salary, equity participation, and comprehensive benefits.
- Flexible work environment with full remote capabilities.
Compensation
Competitive salary, equity, comprehensive benefits package
Work Arrangement
Remote (Global) — Flexible work environment with remote work options
Team
Lead a lean, elite team of emulation specialists; responsible for recruiting, mentoring, and managing team growth.
- Startup mindset with emphasis on initiative and problem-solving over process.
- Fast-paced development environment.
- Team composed of highly skilled and passionate engineers.
- Focused on innovation in AI hardware.
Additional Information
- Fully remote work environment.
- Fast-paced startup setting.
- Role includes building and leading a new team from the ground up.
