Solidigm is hiring a Principal Power Architect to own the end-to-end power and energy strategy across our Solid-State Drive (SSD) and System-on-Chip (SoC) platforms. You will define the architectural vision and implementation strategies to achieve industry-leading performance per watt, thermal efficiency, and predictable power behavior for client, enterprise, and hyperscale applications, acting as the single point of accountability for SSD power architecture.

What You'll Do

Define the end-to-end power architecture for next-generation SSD SoCs, including policies for active, idle, and deep-sleep states.
Architect dynamic power management (DPM) strategies across firmware, SoC, and NAND subsystems.
Lead power-performance tradeoff analysis and establish architectural targets for performance-per-watt across workloads and use cases.
Work with SoC teams to define clock, voltage, and domain partitioning schemes, including fine-grained power gating and dynamic frequency scaling (DVFS).
Collaborate with firmware architects to co-design firmware power governors, workload-aware throttling, and adaptive power modes.
Analyze and model real-world power telemetry, creating predictive power models that drive SoC and firmware design.
Develop power measurement and validation methodologies, correlating simulation, emulation, and silicon data.
Partner with NAND engineering to characterize and optimize flash operation power profiles, especially in mixed workload and sustained write scenarios.
Drive thermal design constraints and performance guardbands in collaboration with mechanical and packaging teams.
Benchmark competitive solutions and ensure the company maintains leadership in energy efficiency and thermal scalability.

What We're Looking For

M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or related field (or equivalent practical experience).
10+ years of experience in SoC or storage system architecture with a strong focus on power and performance optimization.
Deep understanding of low-power SoC microarchitecture, including DVFS, clock gating, retention domains, and power islands.
Proven experience in SSD firmware power management or equivalent embedded systems with power-aware control loops.
Expertise in power modeling and measurement — both pre-silicon and post-silicon.
Familiarity with thermal management, voltage regulation, and workload profiling.
Strong ability to navigate hardware/firmware co-optimization challenges.

Nice to Have

Experience with PCIe/NVMe, CXL, or chiplet-based power domains.
Background in machine learning–based power prediction or adaptive workload management.
Experience with power modeling tools and simulation frameworks (e.g., PowerArtist, PrimePower, SystemC).
Proven leadership in cross-functional technical programs.