As a Design Verification Intern, you will play a hands-on role in validating advanced RISC-V CPU designs tailored for artificial intelligence and machine learning applications. You'll work directly on functional verification tasks, helping to define test plans and construct testbenches that validate both instruction set architecture (ISA) compliance and microarchitectural behavior.
Key Responsibilities
- Support the development and execution of verification strategies for high-performance CPU cores.
- Create and maintain testbenches using SystemVerilog and related methodologies to ensure robust functional coverage.
- Analyze and debug register transfer level (RTL) code, contributing to design improvements that influence final silicon.
- Develop automation tools and stimulus generators that operate across pre-silicon simulation and post-silicon validation environments.
Qualifications
You should be currently enrolled in a Bachelor’s, Master’s, or PhD program in Electrical Engineering, Computer Engineering, Computer Science, or a closely related discipline. A solid academic background is expected, along with practical experience in one or more of the following: C++, SystemVerilog, scripting languages, assembly programming, or digital design.
Successful candidates will demonstrate strong problem-solving skills and the ability to operate across hardware and software domains. Familiarity with low-level processor behavior and a genuine curiosity about how CPUs execute instructions are essential.
Technical Environment
You'll work within a modern verification ecosystem involving C++, SystemVerilog, scripting languages, RTL analysis, assembly-level testing, and industry-standard DV tools. The role spans both pre-silicon simulation platforms and post-silicon bring-up environments, offering broad exposure to full-chip development workflows.
Learning & Development
- Receive direct mentorship from experienced engineers working across multiple technical domains.
- Gain practical insight into how performance considerations, RTL implementation, and verification tooling converge in real-world chip development.
- Deepen your understanding of CPU microarchitecture, ISA-level correctness, and system-wide debugging techniques.
Work Environment
This is an on-site position requiring 40 hours per week at either the Santa Clara, CA or Austin, TX location. The team values collaboration, intellectual curiosity, and a shared commitment to solving complex technical challenges in the AI hardware space.
Eligibility & Compensation
Applicants must be eligible to access U.S. export-controlled technology under the Export Administration Regulations (EAR). Employment may be contingent on citizenship, permanent residency, or the ability to obtain a license from the U.S. Department of Commerce, depending on nationality.
The hourly rate for this internship ranges from $50 to $70, inclusive of base and variable compensation. The company is an equal opportunity employer committed to diversity and inclusion in the workplace.
