Responsibilities
- Lead the development and ownership of high-speed printed circuit board assemblies for next-generation imaging payloads, including sensor interfaces and data capture electronics.
- Work closely with systems engineers to establish electrical requirements and select CMOS image sensors based on quantum efficiency, full-well capacity, and noise performance.
- Design low-noise power delivery systems and high-speed differential signal paths using LVDS or MIPI protocols to preserve image fidelity.
- Collaborate with firmware and FPGA teams to refine image processing workflows and implement hardware-based calibration for dark current and pixel defects.
- Define electrical specifications for precise sensor alignment, incorporating flexible connections and thermal sensors to maintain focus under varying orbital temperatures.
Work Arrangement
Hybrid
Application Deadline
Applications must be submitted by June 4, 2026 at 11:59 p.m. Pacific Time.
EAR/ITAR Requirements
This role involves access to export-controlled data. Employment is dependent on the candidate’s eligibility to access such information without requiring additional export authorization from the Bureau of Industry and Security or the Directorate of Defense Trade Controls.
