Marvell Semiconductor Inc. is looking for a Principal Software Engineer to join the Optical Digital Signal Processing (ODSP) PHY SW Team. You will develop embedded software for DSP products used in optical modules and provide technical leadership combined with project coordination throughout the product lifecycle.
What You'll Do
- Lead architecture, design, development, and testing of embedded C firmware for controlling DSP hardware.
- Serve as technical lead on a product, guiding SW team members (2-8 developers) through the development process.
- Drive firmware development for DSP control blocks including RX/TX signal processing, FEC, PLL/FLL, reference generation, and thermal monitoring.
- Lead technical reviews of firmware architecture, API design, and system integration approaches.
- Translate complex specifications from standards bodies (MSA/OIF/CMIS) or customers into requirements and sequence diagrams.
- Take lead on difficult-to-debug issues, drive to root causes with HW/Systems teams, and follow up with test/validation/customer support teams.
- Work with cross-functional team to plan SW milestones, develop in sprints, close tickets, and roll out features.
- Coordinate with Marketing, AE, Test, Validation, SW_QA, and Hardware teams to align on deliverables and schedules.
- Provide regular status updates on milestones, scope, dependencies, and blockers.
- Manage Agile sprint planning and backlog prioritization with stakeholders.
- Lead technical discussions with tier-1 customers on feature requirements, API specifications, and implementation.
- Support customer bring-up activities and resolve field issues.
- Work with AE teams to understand customer expectations and deliver critical features.
- Handle customer-specific feature development such as FEC burst statistics, VDM telemetry, and CMIS compliance.
- Mentor engineers on embedded firmware development, debugging techniques, and best practices.
- Conduct code reviews and provide technical guidance to ensure code quality and maintainability.
- Foster collaboration across geographically distributed teams.
What We're Looking For
- BS/MS degree in Computer Science, Electrical/Software Engineering, or related technical field(s).
- 10+ years of experience in memory-constrained embedded C/C++ firmware development.
- SW Team Lead or Technical Lead experience on embedded projects.
- Experience with architecture design & development, code reviews & testing, through to customer volume production.
- Understanding of embedded SoC, micro-controller architecture (RISC-V a plus), memory-mapped hardware interfaces, GPIOs, ISRs, etc.
- Excellent verbal and written communication skills in English, and ability to collaborate in a large cross-functional organization.
- Excellent problem-solving and customer debug skills on real hardware in the lab.
- Experience with using revision control and defect tracking systems.
Nice to Have
- Experience with SERDES, IM-DD/Coherent DSP, Ethernet/PCIe PHYs, and/or Optical Module SW.
- Experience with designing/developing/debugging software state machines, transitions, context saving, error handling.
- Experience with mixed-signal (analog+digital) control and monitoring, PID/feedback loop control.
- Experience with bare-metal, RTOS, device driver, Linux kernel, etc.
- Familiarity with advanced compiler options and details (clang/gcc preferred).
- Proficient in C and Python, with knowledge of git, Linux, makefiles, gdb, IDEs, bash.
- Familiarity with digital verification test flows, FPGA emulation, hardware languages such as Verilog.
- Familiarity with lab equipment such as oscilloscopes, supplies, PNAs, ONTs.
- Understanding of Ethernet networking from the OSI model, with emphasis on the PHY up to the data link level.
- Familiarity with forward error correction, PCS framing, PMA/PMD, PRBS, and other PHY traffic schemes.
- Understanding of signal processing: histograms, BER, SNR, sampling phase, Shannon limit, impulse & frequency response, FFT, etc.
Technical Stack
- C, C++, Python
- RISC-V
- git, Linux, makefiles, gdb, bash
- clang/gcc
- Verilog
Team & Environment
You will be part of the Optical Digital Signal Processing (ODSP) PHY SW Team, leading a sub-team of 2-8 developers.
Benefits & Compensation
- Competitive compensation: 145,800 - 194,400 CAD per annum
- Great benefits
- Shared collaboration, transparency, and inclusivity environment
- Tools and resources to succeed and grow
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

