Renesas Electronics is hiring a Principal Engineer – Implementation Lead to own synthesis and timing closure sign-off for low-power, chiplet-based MCU designs on cost-optimized mature process nodes. This role is central to ensuring design quality and convergence while directly impacting product success.
What You'll Do
- Drive RTL-to-gate synthesis for complex multi-die MCU designs using industry-standard tools.
- Optimize for timing, power, and area while adhering to mature-node constraints.
- Lead static timing analysis (STA) and timing closure activities across multiple corners and modes.
- Ensure sign-off compliance for timing, power, and signal integrity.
- Work closely with RTL, DFT, and physical design teams to resolve timing issues.
- Own full chip constraints and design optimizations to achieve convergence.
- Define and maintain synthesis and timing closure methodologies tailored for cost-sensitive MCU designs.
- Evaluate EDA tools and flows for improved efficiency and turnaround time.
What We're Looking For
- BTech/MTech in Electrical/Electronic Engineering, Computer Engineering or Computer Science with 15+ years of experience in ASIC/SoC implementation.
- Proven experience in mature-node technologies (e.g., 22nm, 12nm) and low-power design strategies and multi-clock domain designs.
- Expertise in Synopsys/Cadence synthesis tools and STA tools.
- Expertise in multi-mode, multi-corner timing analysis and constraint management.
- Experience in timing closure of external interfaces like SPI/I2C/Ethernet/CAN.
- Experience with hierarchical timing closure.
- Experience with UPF/CPF-based power intent and low-power optimization techniques.
- Extensive experience with ECO flows for timing fixes and late-stage design changes.
- Strong scripting skills (Tcl, Perl, Python) for automation of synthesis and STA flows.
- Strong communication, problem-solving, teamwork, attention to detail, and quality focus.
- A can-do attitude, openness to new environment, people and culture.
- Ability to propose innovative and leading edge solutions.
- Strong drive & ability to coordinate work across highly experienced global teams.
Nice to Have
- Experience with timing sign-off for chiplet-based designs is a strong plus.
Technical Stack
- Synopsys/Cadence synthesis tools
- STA tools
- Tcl, Perl, Python
Team & Environment
You will work closely with RTL, DFT, and physical design teams across our global organization.
Benefits & Compensation
- Launch and advance your career in technical and business roles across four Product Groups and various corporate functions.
- Make a real impact by developing innovative products and solutions.
- Maximize your performance and wellbeing in our flexible and inclusive work environment.
- Remote work option and Employee Resource Groups.
Work Mode
This role offers a hybrid work arrangement.
Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination.
