Responsibilities
- Develop Linux user-space and kernel-level code enabling 32-bit drivers to access 64-bit virtual memory via Intel and AMD IOMMU controllers.
- Operate at the hardware-software interface for ASICs, managing systems with thousands of registers, tables, and specialized TCAM memory structures.
- Program networking ASICs to enable ultra-fast event tracking and latency measurement at multi-billion events per second scale.
- Use Python scripts to initialize and bring up new hardware platforms.
- Design software agents that translate between switching ASICs, FPGAs, media interfaces, and PCIe bridges.
- Calibrate optical components and monitor error rates down to parts per billion.
- Implement Layer 2 protocols including LLDP, 802.1x, and BFD, as well as Layer 3 routing protocols such as BGP, OSPF, and ISIS.
- Update hardware forwarding tables using abstractions independent of underlying hardware platforms.
- Align Linux kernel routing subsystems with switch ASIC forwarding state for consistency.
- Design and implement a domain-specific policy language for filtering and modifying routing information exchanged with peers.
- Read and write ASIC registers over SPI, SMbus, PCIe, and I2C to enable sub-100ns timing accuracy and collect real-time packet flow metrics and congestion data.
- Build configuration management services in Go and Python supporting YANG, OpenConfig, NETCONF, and RESTCONF over gRPC, SSH, and SSL, integrated with development tools like git, Gerrit, Jenkins, Slack, and Trello.
- Develop routing protocol daemons in C/C++ for BGP, OSPF, and ISIS within an embedded Fedora Linux environment.
- Create concurrent, fault-tolerant agents designed for high availability and performance in next-generation data centers.
- Maintain a fully automated, Python-driven continuous testing framework supporting hundreds of devices under test simultaneously.
Compensation
Competitive salary and benefits package
Work Arrangement
On-site or hybrid depending on team and location
Team
Collaborative engineering environment focused on systems-level innovation and high-performance networking
Responsibilities
- Writing Linux user space and kernel code to allow 32-bit drivers to DMA 64-bit virtual memory spaces using both Intel and AMD IOMMU controller.
- Working on the hardware/software boundary for chips and the kernel. Where an x86 chip might have tens of registers, you will routinely work on ASICs with thousands of registers, tables, and special TCAM memories.
- Programming networking chips to provide latency analysis and keep accurate counts of events happening billions of times per second.
- Writing Python to bootstrap new hardware.
- Building software agents that mediate and translate between the requirements of switching ASICs, high capacity custom FPGAs, media adapters, and PCIe bridges.
- Tuning lasers and measure and correct error rates measured in parts per billion.
- Implementing communications protocols between routers and switches at layer 2 (such as LLDP, 802.1x, BFD, etc), and layer 3 (such as BGP, OSPF, ISIS).
- Updating the forwarding state of the hardware, using platform-independent abstractions.
- Reconciling the linux kernel routing model with the switch's forwarding state.
- Implementing a policy language used for filtering and manipulating routing data received and advertised to peers
- Accessing ASIC registers over SPI bus, SMbus, PCIe and I2C, to implement high resolution timers (sub-100ns accuracy) and read ASIC hardware specifications to gather near-real-time information on large numbers of packet flows and to generate network congestion statistics.
- Developing configuration management services using Go and Python to support YANG, OpenConfig, NETCONF and RESTCONF over gRPC, ssh and ssl for standardised switch configuration, combined with tools such as git, gerrit, Jenkins, Slack and Trello.
- Developing routing protocol agents (for BGP, OSPF, ISIS) in C/C++ within a Fedora Linux embedded environment.
- Coding of fault-tolerant, concurrent agents capable of handling the demands of future data centres where high performance and high availability are basic requirements.
- Fully automated, developer owned, Python based, continuous test harness with 100s of devices under test at any one moment.
Sponsorship available for qualified candidates requiring work authorization
