Chandler, AZ On-site Full-time USD 150,000 – 200,000 / year

PowerLattice is hiring a Senior/Staff Hardware Design Engineer

About Us Powerlattice is a well-funded semiconductor start-up company backed by well-known large Silicon Valley VCs. The company is working on the industry’s groundbreaking chiplet solution for a fundamental shift in how high-performance chips get powered, paving the way for the next generation of AI and advanced computing. About the Role We are seeking a Senior/Staff Hardware Design Engineer for developing hardware system for Powerlattice’s internal usages and collaborating Powerlattice’s customers on AI/Datacenter motherboard design to enable the adoption Powerlattice’s power chiplets. This individual is responsible for end-end hardware lifecycle, from initial schematic entry to complex PCB design and system bring-up. The ideal candidate combines deep system design expertise with strong cross-functional leadership skills and a proven record of delivering complex hardware systems for data center or enterprise markets. Key Responsibilities Define and drive overall hardware system architecture and top-level specifications. Lead hardware system design and system integration. Perform high-level feasibility analysis and risk assessment. Review and approve hardware designs to ensure architectural alignment. Drive system bring-up strategy and debug execution. Perform hardware system design. Conduct schematic design, simulation, analysis, and optimization to meet performance targets. Provide PCB layout guidance and collaborate closely with PCB layout engineers to ensure design intent is met. Collaborate with PI/SI engineer to ensure the proper PDN performance. Participate in design reviews and contribute to design documentation. Participate in silicon bring-up, characterization, and debugging. Follow best practices for hardware system design, verification, and signoff. Qualifications This role is onsite based in Chandler, AZ M.S. or Ph.D. in electrical engineering or related fields. 5+ years of hands-on hardware system design experience. Proven experience as a technical lead or system lead. Experience in working with supply chain vendors. Demonstrated leadership and mentorship capabilities. Preferred Qualifications Experience in server motherboard design. Familiarity with power delivery design and component choice for high performance server system. Good communication skills and ability to work in a collaborative team environment. Compensation & Benefits Anticipated annual base salary for Member of Technical Staff: $150,000 - $200,000 Stock option grant and benefits package Comprehensive benefits package including health, dental, vision, and 401(k)
Job Details
Location Chandler, AZ
Work mode On-site
Employment Full-time
Salary USD 150,000 – 200,000 / year
Department Engineering
Category other
Posted 3 months ago
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About company
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PowerLattice is reimagining power delivery for next-generation AI accelerators with the industry's first power delivery chiplet. The company tightly integrates power and compute, delivering power precisely where and when it’s needed to achieve breakthrough performance, efficiency, and scalability for AI and data center infrastructure.

PowerLattice’s solution breaks through the AI “power wall” by integrating voltage regulation directly into the processor package, drastically reducing power loss and noise. This enables more than 50% reduction in effective compute power needs, cooler runtime, and up to 2X or more raw performance uplift under fixed power budgets.

The company’s chiplet architecture is based on its proprietary Rainier micro-IVR technology, combining miniaturized on-die magnetic inductors, advanced control circuits, and a programmable software layer in a vertical, scalable design. This allows seamless adaptation to any SoC power topology and supports flexible integration into various packaging schemes.

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