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Chandler, AZ; HQ - Vancouver, WA Hybrid Employment USD 150,000 – 200,000 / year

PowerLattice is hiring a Senior/Staff Analog IC Design Engineer

Responsibilities

  • Design and develop core analog and mixed-signal circuit blocks, including bandgap references, oscillators, LDOs, op-amps, ADCs, and DACs
  • Translate system and block-level specifications into robust circuit architectures and implementations
  • Perform schematic capture, simulation, and optimization to meet performance, power, area, and reliability targets
  • Provide layout guidance and collaborate closely with layout engineers to ensure design intent is met
  • Perform post-layout (PEX) simulations and correlations with pre-layout analysis
  • Participate in design reviews and contribute to clear, thorough design documentation
  • Support silicon bring-up, block-level evaluation, characterization, and debugging
  • Apply best practices for analog design, verification, and sign-off

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Science or a related field
  • 5+ years of hands-on analog design experience
  • Strong foundation in analog circuit theory, device physics, and CMOS technologies
  • Experience designing common analog blocks such as bandgaps, LDOs, oscillators, op-amps, ADCs, and DACs
  • Proven ability to carry designs from specification through schematic, simulation, layout guidance, and post-layout verification
  • Proficiency with industry-standard EDA tools (e.g., Cadence)
  • Solid experience with DC, AC, transient, noise, and corner simulations
  • Working knowledge of reliability, mismatch, and layout-dependent effects
  • Hands-on laboratory experience, including silicon bring-up, bench characterization, and debugging of analog/mixed-signal ICs

Nice to Have

  • Experience with deep submicron CMOS process technologies
  • Familiarity with high-power or high-accuracy analog design techniques
  • Strong communication skills and the ability to work effectively in a collaborative team environment

Work Arrangement

Hybrid

Additional Information

  • Anticipated annual base salary for Member of Technical Staff: $150,000 - $200,000
  • Stock option grant
  • Comprehensive benefits package including health, dental, vision, and 401(k)
About company
PowerLattice

PowerLattice is reimagining power delivery for next-generation AI accelerators with the industry's first power delivery chiplet. The company tightly integrates power and compute, delivering power precisely where and when it’s needed to achieve breakthrough performance, efficiency, and scalability for AI and data center infrastructure.

PowerLattice’s solution breaks through the AI “power wall” by integrating voltage regulation directly into the processor package, drastically reducing power loss and noise. This enables more than 50% reduction in effective compute power needs, cooler runtime, and up to 2X or more raw performance uplift under fixed power budgets.

The company’s chiplet architecture is based on its proprietary Rainier micro-IVR technology, combining miniaturized on-die magnetic inductors, advanced control circuits, and a programmable software layer in a vertical, scalable design. This allows seamless adaptation to any SoC power topology and supports flexible integration into various packaging schemes.

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Job Details
Department Engineering
Category embedded
Posted 5 months ago