About the Role

As a Senior FPGA Engineer, you will contribute to the development of key components within advanced networking systems, including SmartNICs and hybrid optical switches. You will be responsible for designing and optimizing VHDL and/or Verilog implementations, followed by verifying your designs through simulation using Python-based test cases and scenarios. You will integrate your designs and IP cores into FPGA projects, perform timing analysis, and conduct on-target verification. Additionally, you will collaborate closely with software and networking teams on system-level performance testing and debugging.

Requirements

Master’s degree in Electronics Engineering or equivalent experience
Strong knowledge of VHDL and Verilog
Programming skills in Tcl and Python
Experience with timing analysis and closure
Experience with unit simulation testing and test automation (e.g., Jenkins)
Comfortable working in a Linux environment
Understanding of networking concepts (Ethernet, TCP/IP, MAC addressing, buffering, etc.)
Strong problem-solving and debugging abilities
Eagerness to learn and work with new, cutting-edge technologies

Nice to Have

Familiarity with Xilinx FPGA tools and QuestaSim/ModelSim
Experience with Cocotb verification environments
Knowledge of high-speed interfaces (DDR4, Ethernet, PCIe, AXI4, AXI-Lite)

Benefits

The opportunity to work on innovative, high-performance networking solutions that advance modern network architectures
A dynamic, forward-thinking environment that encourages innovation in networking technologies
Opportunities for professional growth in FPGA development, networking, and simulation

Work Arrangement

Hybrid

Additional Information

Applicants must already have the legal right to work in Belgium
Visa sponsorship or work permit support is not available