Responsibilities
- Develop SystemVerilog and Chisel RTL at chip, subsystem, and block levels to meet power, performance, and area goals.
- Define and maintain microarchitectural and design specifications for digital logic across multiple hierarchy levels.
- Lead verification planning and execution including RTL simulation, gate-level simulation, X-propagation, clock domain crossing analysis, linting, and FPGA-based emulation.
- Translate market trends and competitive analysis into technical requirements for product features and performance.
- Improve and support digital design and verification tools, methodologies, and automation infrastructure.
- Design clocking, reset, and power domain architectures; create and validate UPF/CPF power intent through gate-level and power-aware simulation.
- Implement power-saving techniques such as clock gating, power gating, retention, and isolation for energy-constrained IoT devices.
- Integrate mixed-signal IP blocks including ADPLLs, PHYs, I/O pads, and analog macros, managing digital-analog interface specifications.
- Collaborate with firmware, PHY, and MAC teams on register maps, programming models, interrupt handling, and boot processes.
- Serve as chip lead: oversee system-level verification, synthesis quality of results, place-and-route support, netlist delivery, and pre-tapeout signoff.
- Coordinate with analog, layout, physical design, DFT, and software teams to achieve project milestones.
- Utilize AI-powered coding tools effectively across RTL design, testbench development, scripting, and documentation with critical evaluation.
- Explore and promote AI integration into design and verification workflows such as spec parsing, test generation, debug, and code review.
- Manage delivery of large-scale, complex projects with multiple concurrent revisions and tight schedules.
- Guide junior engineers and ensure design quality via code reviews, standards enforcement, and process improvements.
Work Arrangement
Remote (Worldwide) — available in Sydney, Picton, Melbourne, Irvine, San Jose, Bangalore, Cambridge, Hangzhou, Shenzhen, Taipei, Tokyo
Team
Flexible working hours and work-from-home policy in a high-performing, inclusive environment where individuals contribute meaningfully to product success
Other
- Relocation and visa support available for the successful applicant.
- Flexible working hours
- Work from home policy
- Join a high performing, inclusive company where you can make a real impact
Relocation and visa support available for successful candidates
