Responsibilities
- Develop software and automation scripts to enable high-performance CPU simulation and emulation environments.
- Optimize Verilog code to enhance simulation efficiency and support FPGA-based emulation workflows.
- Support and expand Git-based infrastructure to enable continuous integration, delivery, and nightly regression testing across diverse development platforms.
- Create software utilities and scripting tools to automate and streamline aspects of the design verification flow.
Benefits
- Offers a competitive compensation and benefits package with a commitment to equal opportunity employment.
Compensation
Compensation for interns ranges from $50 to $70 per hour, inclusive of base and variable components.
Work Arrangement
On-site in Santa Clara, CA or Austin, TX
Work Arrangement
This role is on site, based out of Santa Clara, CA or Austin, TX.
Other
- This is for our Fall 2026 Semester
- This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology.
- Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2).
- These requirements apply to persons located in the U.S. and all countries outside the U.S.
- As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency.
- If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
